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Tom Moran <[log in to unmask]>
Sat, 4 Nov 2006 10:02:48 -0800
text/plain (19 lines)
Are there 8 separate caches or do they share?  How big is cache?

Karl A. Nyberg wrote:

>I hope soon to be the recipient of an evaluation Sun Niagara T1000 via their
>"Try and Buy" program ( and would
>like to try to make it available for folks with an application that they
>would like to run in this kind of an environment.  It will be an 8-core
>machine (which, with their "4 threads per core pipelining", well, you get
>the idea...).  If you are interested, please drop me a line.
>Applications with low floating point requirements only need apply...  Only
>one FPU on the chip...
>-- Karl --